The spy tool has been assembled with the assmbler of th
AVR studio4 tool.
The reason I did this is to speed up everything to make
optimal use of the ATMega16. Uo can check for instance
how long the ATMega16 will take the interrupt routines.
This is really amazing !

I measured the JTAG signals with a Tectornix scope and
discoverd that on the rising egde of the jtag clock
the input and output data has changed and has the
right value. If we connect the jtag clock to an alternative
pin with interrupt capability then you can't miss the
data we need. If we do it smart enough then connect all
jtag signals to one port. When the rising edge of the
jtag clock triggers the interrupt then all we need to do is
to read this port and put the data into a buffer for further
handling. The jtag clock is only important in here.

The JTAG protocol mentions a TAP controller which is built
as a state machine. You can see therefore the different
"case" statements in the jtag_spy routine.
The jtag clock is not important anymore so the TMS signal
is the next important one.
The TMS is the one that can change the state in which the TAP
controller is in. If not then capture the TDI and TDO
inputs (well, actually these are inputs for the spy).

When the exit stage has been reached then dump all the
collected bits and dump these as 2 "big" arrays : one is
the data to be shifted in and one is the data to be shifted
out.
With some guidance (the letters !) you can see what is going
on.
