JOSMA V1.0.1
Analysing file: start-2.raw

Found 21470 samples

INST: IDCODE
 TDI 0000_0000_0000_0000_0110_0110_0000_0011 = 00006603, L: 32 
 TDO 1110_1001_0100_0000_0011_0000_0011_1111 = e940303f, L: 32 

INST: IDCODE
 TDI 0000_0000_0000_0010_0110_1000_0000_0011 = 00026803, L: 32 
 TDO 1110_1001_0100_0000_0011_0000_0011_1111 = e940303f, L: 32 

INST: AVR_RESET
 TDI 1 = 1, L: 1 
 TDO 0 = 0, L: 1 

INST: PROG_ENABLE
 TDI 1010_0011_0111_0000 = a370, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: PROG_COMMANDS
 TDI 010_0011_0000_0100 = 2_304, L: 15 
 TDO 010_0011_0011_0011 = 2_333, L: 15 
 TDI 011_0110_0000_0000 = 3_600, L: 15 
 TDO 010_0011_0000_0100 = 2_304, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0110_1111_1111 = 3_6ff, L: 15 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: PROG_COMMANDS
 TDI 010_0011_0000_0100 = 2_304, L: 15 
 TDO 011_0111_0000_0000 = 3_700, L: 15 
 TDI 011_1110_0000_0000 = 3_e00, L: 15 
 TDO 010_0011_0000_0100 = 2_304, L: 15 
 TDI 011_1111_0000_0000 = 3_f00, L: 15 
 TDO 011_1110_0000_1001 = 3_e09, L: 15 

INST: PROG_COMMANDS
 TDI 010_0011_0100_0000 = 2_340, L: 15 
 TDO 011_1111_0000_0000 = 3_f00, L: 15 
 TDI 001_0011_0000_1001 = 1_309, L: 15 
 TDO 010_0011_0100_0000 = 2_340, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 001_0011_0000_1001 = 1_309, L: 15 
 TDI 011_0101_0000_0000 = 3_500, L: 15 
 TDO 011_0111_0000_0000 = 3_700, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0111_0000_0000 = 3_700, L: 15 

INST: PROG_COMMANDS
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 011_0111_0000_0000 = 3_700, L: 15 
 TDI 010_0001_1000_0000 = 2_180, L: 15 
 TDO 010_0011_1000_0000 = 2_380, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010 = 2, L: 3 
 TDO 010 = 2, L: 3 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 
 TDI 010_0011_1000_0000 = 2_380, L: 15 
 TDO 010_0001_1000_0000 = 2_180, L: 15 

INST: PROG_ENABLE
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1010_0011_0111_0000 = a370, L: 16 

INST: AVR_RESET
 TDI 0 = 0, L: 1 
 TDO 1 = 1, L: 1 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0010_1000_0000_0001 = 0_82801, L: 21 
 TDO 0_1000_0000_0000_0000_0000 = 0_80000, L: 21 
 TDI 1_1000_0000_0000_0000_0000 = 1_80000, L: 21 
 TDO 0_1000_0000_0000_0000_0000 = 0_80000, L: 21 

INST: IDCODE
 TDI 0000_0000_0000_0111_0110_1101_0000_0011 = 00076d03, L: 32 
 TDO 1110_1001_0100_0000_0011_0000_0011_1111 = e940303f, L: 32 

INST: AVR_RESET
 TDI 1 = 1, L: 1 
 TDO 0 = 0, L: 1 

INST: PROG_ENABLE
 TDI 1010_0011_0111_0000 = a370, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: PROG_COMMANDS
 TDI 010_0011_0001_0000 = 2_310, L: 15 
 TDO 010_0011_0011_0011 = 2_333, L: 15 
 TDI 000_0111_0000_0000 = 0_700, L: 15 
 TDO 010_0011_0001_0000 = 2_310, L: 15 
 TDI 000_0011_0000_0000 = 0_300, L: 15 
 TDO 000_0111_0000_0000 = 0_700, L: 15 

INST: PROG_PAGELOAD
 TDI 1110_0000_0001_0001_1110_0001_0000_1111 = e011e10f, L: 32 
 TDO 0001_0001_1110_0001_0000_1111_0000_0000 = 11e10f00, L: 32 
 TDI 1011_1111_0001_1110_1011_1111_0000_1101 = bf1ebf0d, L: 32 
 TDO 0001_1110_1011_1111_0000_1101_1110_0000 = 1ebf0de0, L: 32 
 TDI 0010_1100_0001_0000_0010_0100_0000_0000 = 2c102400, L: 32 
 TDO 0001_0000_0010_0100_0000_0000_1011_1111 = 102400bf, L: 32 
 TDI 1001_0101_0101_0011_1001_0100_0001_0011 = 95539413, L: 32 
 TDO 0101_0011_1001_0100_0001_0011_0010_1100 = 5394132c, L: 32 
 TDI 0011_0000_0110_0000_1001_0101_0110_0011 = 30609563, L: 32 
 TDO 0110_0000_1001_0101_0110_0011_1001_0101 = 60956395, L: 32 
 TDI 0011_0000_0101_0000_1111_0111_1110_1001 = 3050f7e9, L: 32 
 TDO 0101_0000_1111_0111_1110_1001_0011_0000 = 50f7e930, L: 32 
 TDI 1100_1111_1111_1001_1111_0111_1101_0001 = cff9f7d1, L: 32 
 TDO 1111_1001_1111_0111_1101_0001_0011_0000 = f9f7d130, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1100_1111 = ffffffcf, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDI 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDO 1111_1111_1111_1111_1111_1111_1111_1111 = ffffffff, L: 32 
 TDI 11_1111_1111_1111 = 3_fff, L: 14 
 TDO 11_1111_1111_1111 = 3_fff, L: 14 
Total DR register length was: 526 bit

INST: PROG_COMMANDS
 TDI 011_0000_0000 = 3_00, L: 11 
 TDO 011_1111_1111 = 3_ff, L: 11 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000 = 3_70, L: 11 
 TDO 011_0101_0000 = 3_50, L: 11 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 011_0111_0000_0000 = 3_700, L: 15 
 TDO 011_0101_0000_0000 = 3_500, L: 15 
 TDI 0000_0000 = 00, L: 8 
 TDO 1000_0000 = 80, L: 8 

INST: PROG_ENABLE
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1010_0011_0111_0000 = a370, L: 16 

INST: AVR_RESET
 TDI 0 = 0, L: 1 
 TDO 1 = 1, L: 1 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: AVR_RESET
 TDI 0 = 0, L: 1 
 TDO 0 = 0, L: 1 

INST: CMD 0x8 (stop)

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_1100 = 000c, L: 16 

INST: AVR_RESET
 TDI 1 = 1, L: 1 
 TDO 0 = 0, L: 1 

INST: CMD 0xb (OCD ctrl and status)
 TDI 1_0000_0000_0000_0000_0000 = 1_00000, L: 21 
 TDO 0_0000_0000_0000_0000_0000 = 0_00000, L: 21 
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0000_0000_0000_0000 = 0_80000, L: 21 
 TDO 0_1000_0000_0000_0000_0000 = 0_80000, L: 21 
 TDI 1_1000_0000_1000_0000_0000 = 1_80800, L: 21 
 TDO 0_1000_0000_0000_0000_0000 = 0_80000, L: 21 

INST: AVR_RESET
 TDI 0 = 0, L: 1 
 TDO 1 = 1, L: 1 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_1100 = 000c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0000_1000_0000_0000 = 0_80800, L: 21 
 TDO 0_1000_0000_1000_0000_0000 = 0_80800, L: 21 
 TDI 1_1000_0000_0000_0000_0000 = 1_80000, L: 21 
 TDO 0_1000_0000_1000_0000_0000 = 0_80800, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1111_1111_1111_1111_0000_0000_0000_0001 = ffff0001, L: 32 	.word	0x0001	; ????
 TDO 1111_1111_1111_1111_0000_0000_0000_0001 = ffff0001, L: 32 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_1000_0001_1010_0000 = 0_d81a0, L: 21 
 TDO 0_1101_0000_0000_0000_0100 = 0_d0004, L: 21 
 TDI 1_1101_1000_0000_0000_0100 = 1_d8004, L: 21 
 TDO 0_1101_0000_0000_0000_0100 = 0_d0004, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1110_0001 = bfe1, L: 16 	out	0x31, r30	; 49
 TDO 0000_0000_0000_0001 = 0001, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1111_0001 = bff1, L: 16 	out	0x31, r31	; 49
 TDO 0000_0000_0000_0010 = 0002, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1011_0000_0000 = fb00, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0000_0001_0000_0010 = 0_d0102, L: 21 
 TDO 0_1101_1000_0000_0001_1100 = 0_d801c, L: 21 
 TDI 1_1101_1000_0000_0001_1100 = 1_d801c, L: 21 
 TDO 0_1101_1000_0000_0001_1100 = 0_d801c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0000_0001 = be01, L: 16 	out	0x31, r0	; 49
 TDO 0000_0000_0000_0011 = 0003, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0001_0001 = be11, L: 16 	out	0x31, r1	; 49
 TDO 0000_0000_0000_0100 = 0004, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0010_0001 = be21, L: 16 	out	0x31, r2	; 49
 TDO 0000_0000_0000_0101 = 0005, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0011_0001 = be31, L: 16 	out	0x31, r3	; 49
 TDO 0000_0000_0000_0110 = 0006, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0100_0001 = be41, L: 16 	out	0x31, r4	; 49
 TDO 0000_0000_0000_0111 = 0007, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0101_0001 = be51, L: 16 	out	0x31, r5	; 49
 TDO 0000_0000_0000_1000 = 0008, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0110_0001 = be61, L: 16 	out	0x31, r6	; 49
 TDO 0000_0000_0000_1001 = 0009, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0111_0001 = be71, L: 16 	out	0x31, r7	; 49
 TDO 0000_0000_0000_1010 = 000a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_0010_0000_0000 = 1200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1000_0001 = be81, L: 16 	out	0x31, r8	; 49
 TDO 0000_0000_0000_1011 = 000b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0100_0000_0000_0000 = 4000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1001_0001 = be91, L: 16 	out	0x31, r9	; 49
 TDO 0000_0000_0000_1100 = 000c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1010_0001 = bea1, L: 16 	out	0x31, r10	; 49
 TDO 0000_0000_0000_1101 = 000d, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0010_0000_0000 = 0200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1011_0001 = beb1, L: 16 	out	0x31, r11	; 49
 TDO 0000_0000_0000_1110 = 000e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1100_0001 = bec1, L: 16 	out	0x31, r12	; 49
 TDO 0000_0000_0000_1111 = 000f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1101_0001 = bed1, L: 16 	out	0x31, r13	; 49
 TDO 0000_0000_0001_0000 = 0010, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1110_0001 = bee1, L: 16 	out	0x31, r14	; 49
 TDO 0000_0000_0001_0001 = 0011, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1111_0001 = bef1, L: 16 	out	0x31, r15	; 49
 TDO 0000_0000_0001_0010 = 0012, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0001_0011 = 0013, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_1111_0000_0000 = 1f00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0001_0001 = bf11, L: 16 	out	0x31, r17	; 49
 TDO 0000_0000_0001_0100 = 0014, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0010_0001 = bf21, L: 16 	out	0x31, r18	; 49
 TDO 0000_0000_0001_0101 = 0015, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0011_0001 = bf31, L: 16 	out	0x31, r19	; 49
 TDO 0000_0000_0001_0110 = 0016, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0100_0001 = bf41, L: 16 	out	0x31, r20	; 49
 TDO 0000_0000_0001_0111 = 0017, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_1000_0000_0000 = 0800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0101_0001 = bf51, L: 16 	out	0x31, r21	; 49
 TDO 0000_0000_0001_1000 = 0018, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0011_0000_0000 = 8300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0110_0001 = bf61, L: 16 	out	0x31, r22	; 49
 TDO 0000_0000_0001_1001 = 0019, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1001_0000_0000 = f900, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0111_0001 = bf71, L: 16 	out	0x31, r23	; 49
 TDO 0000_0000_0001_1010 = 001a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1000_0001 = bf81, L: 16 	out	0x31, r24	; 49
 TDO 0000_0000_0001_1011 = 001b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1001_0001 = bf91, L: 16 	out	0x31, r25	; 49
 TDO 0000_0000_0001_1100 = 001c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0010_0000_0000 = 0200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1010_0001 = bfa1, L: 16 	out	0x31, r26	; 49
 TDO 0000_0000_0001_1101 = 001d, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1011_0001 = bfb1, L: 16 	out	0x31, r27	; 49
 TDO 0000_0000_0001_1110 = 001e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1011_0000_0000 = fb00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1100_0001 = bfc1, L: 16 	out	0x31, r28	; 49
 TDO 0000_0000_0001_1111 = 001f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1101_0001 = bfd1, L: 16 	out	0x31, r29	; 49
 TDO 0000_0000_0010_0000 = 0020, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1110_0001 = bfe1, L: 16 	out	0x31, r30	; 49
 TDO 0000_0000_0010_0001 = 0021, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1111_0001 = bff1, L: 16 	out	0x31, r31	; 49
 TDO 0000_0000_0010_0010 = 0022, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1011_0000_0000 = fb00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0000 = b100, L: 16 	in	r16, 0x00	; 0
 TDO 0000_0000_0010_0011 = 0023, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0010_0100 = 0024, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0001 = b101, L: 16 	in	r16, 0x01	; 1
 TDO 0000_0000_0010_0101 = 0025, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0010_0110 = 0026, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1000_0000_0000 = f800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0010 = b102, L: 16 	in	r16, 0x02	; 2
 TDO 0000_0000_0010_0111 = 0027, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0010_1000 = 0028, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1110_0000_0000 = fe00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0011 = b103, L: 16 	in	r16, 0x03	; 3
 TDO 0000_0000_0010_1001 = 0029, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0010_1010 = 002a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0110 = b106, L: 16 	in	r16, 0x06	; 6
 TDO 0000_0000_0010_1011 = 002b, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0010_1100 = 002c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0111 = b107, L: 16 	in	r16, 0x07	; 7
 TDO 0000_0000_0010_1101 = 002d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0010_1110 = 002e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1000 = b108, L: 16 	in	r16, 0x08	; 8
 TDO 0000_0000_0010_1111 = 002f, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0011_0000 = 0030, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0010_0000_0000_0000 = 2000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1001 = b109, L: 16 	in	r16, 0x09	; 9
 TDO 0000_0000_0011_0001 = 0031, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0011_0010 = 0032, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1010 = b10a, L: 16 	in	r16, 0x0a	; 10
 TDO 0000_0000_0011_0011 = 0033, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0011_0100 = 0034, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1011 = b10b, L: 16 	in	r16, 0x0b	; 11
 TDO 0000_0000_0011_0101 = 0035, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0011_0110 = 0036, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0010_0000_0000_0000 = 2000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1101 = b10d, L: 16 	in	r16, 0x0d	; 13
 TDO 0000_0000_0011_0111 = 0037, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0011_1000 = 0038, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1111 = b10f, L: 16 	in	r16, 0x0f	; 15
 TDO 0000_0000_0011_1001 = 0039, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0011_1010 = 003a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0111_1000_0000_0000 = 7800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0000 = b300, L: 16 	in	r16, 0x10	; 16
 TDO 0000_0000_0011_1011 = 003b, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0011_1100 = 003c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1110_0000_0000 = fe00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0001 = b301, L: 16 	in	r16, 0x11	; 17
 TDO 0000_0000_0011_1101 = 003d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0011_1110 = 003e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0010 = b302, L: 16 	in	r16, 0x12	; 18
 TDO 0000_0000_0011_1111 = 003f, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_0000 = 0040, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0011 = b303, L: 16 	in	r16, 0x13	; 19
 TDO 0000_0000_0100_0001 = 0041, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_0010 = 0042, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0100_0011_0000_0000 = 4300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0100 = b304, L: 16 	in	r16, 0x14	; 20
 TDO 0000_0000_0100_0011 = 0043, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_0100 = 0044, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0101 = b305, L: 16 	in	r16, 0x15	; 21
 TDO 0000_0000_0100_0101 = 0045, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_0110 = 0046, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0110 = b306, L: 16 	in	r16, 0x16	; 22
 TDO 0000_0000_0100_0111 = 0047, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_1000 = 0048, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_0111_0000_0000 = f700, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0111 = b307, L: 16 	in	r16, 0x17	; 23
 TDO 0000_0000_0100_1001 = 0049, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_1010 = 004a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1000 = b308, L: 16 	in	r16, 0x18	; 24
 TDO 0000_0000_0100_1011 = 004b, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_1100 = 004c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1001 = b309, L: 16 	in	r16, 0x19	; 25
 TDO 0000_0000_0100_1101 = 004d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_1110 = 004e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1110_0000_0000 = fe00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1010 = b30a, L: 16 	in	r16, 0x1a	; 26
 TDO 0000_0000_0100_1111 = 004f, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_0000 = 0050, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1011 = b30b, L: 16 	in	r16, 0x1b	; 27
 TDO 0000_0000_0101_0001 = 0051, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_0010 = 0052, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1100 = b30c, L: 16 	in	r16, 0x1c	; 28
 TDO 0000_0000_0101_0011 = 0053, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_0100 = 0054, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0000_0101_0101 = 0055, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_0110 = 0056, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1110 = b30e, L: 16 	in	r16, 0x1e	; 30
 TDO 0000_0000_0101_0111 = 0057, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_1000 = 0058, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1111 = b30f, L: 16 	in	r16, 0x1f	; 31
 TDO 0000_0000_0101_1001 = 0059, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_1010 = 005a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0001 = b501, L: 16 	in	r16, 0x21	; 33
 TDO 0000_0000_0101_1011 = 005b, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_1100 = 005c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0010 = b502, L: 16 	in	r16, 0x22	; 34
 TDO 0000_0000_0101_1101 = 005d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_1110 = 005e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0011 = b503, L: 16 	in	r16, 0x23	; 35
 TDO 0000_0000_0101_1111 = 005f, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_0000 = 0060, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0100 = b504, L: 16 	in	r16, 0x24	; 36
 TDO 0000_0000_0110_0001 = 0061, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_0010 = 0062, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0101 = b505, L: 16 	in	r16, 0x25	; 37
 TDO 0000_0000_0110_0011 = 0063, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_0100 = 0064, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0110 = b506, L: 16 	in	r16, 0x26	; 38
 TDO 0000_0000_0110_0101 = 0065, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_0110 = 0066, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0111 = b507, L: 16 	in	r16, 0x27	; 39
 TDO 0000_0000_0110_0111 = 0067, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_1000 = 0068, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1000 = b508, L: 16 	in	r16, 0x28	; 40
 TDO 0000_0000_0110_1001 = 0069, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_1010 = 006a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1001 = b509, L: 16 	in	r16, 0x29	; 41
 TDO 0000_0000_0110_1011 = 006b, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_1100 = 006c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1010 = b50a, L: 16 	in	r16, 0x2a	; 42
 TDO 0000_0000_0110_1101 = 006d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_1110 = 006e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1011 = b50b, L: 16 	in	r16, 0x2b	; 43
 TDO 0000_0000_0110_1111 = 006f, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_0000 = 0070, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1100 = b50c, L: 16 	in	r16, 0x2c	; 44
 TDO 0000_0000_0111_0001 = 0071, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_0010 = 0072, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1101 = b50d, L: 16 	in	r16, 0x2d	; 45
 TDO 0000_0000_0111_0011 = 0073, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_0100 = 0074, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1110 = b50e, L: 16 	in	r16, 0x2e	; 46
 TDO 0000_0000_0111_0101 = 0075, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_0110 = 0076, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1111 = b50f, L: 16 	in	r16, 0x2f	; 47
 TDO 0000_0000_0111_0111 = 0077, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_1000 = 0078, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0000 = b700, L: 16 	in	r16, 0x30	; 48
 TDO 0000_0000_0111_1001 = 0079, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_1010 = 007a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0000_0000_0000_0000 = 0_d0000, L: 21 
 TDO 0_1101_1000_0000_0001_1100 = 0_d801c, L: 21 
 TDI 1_1101_0000_0000_0001_1100 = 1_d001c, L: 21 
 TDO 0_1101_1000_0000_0001_1100 = 0_d801c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0001 = b701, L: 16 	in	r16, 0x31	; 49
 TDO 0000_0000_0111_1011 = 007b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0_1101_0110_0011_1100_1000 = 0_d63c8, L: 21 
 TDO 0_1101_0000_0000_0001_1100 = 0_d001c, L: 21 
 TDI 1_1101_1000_0000_0001_1100 = 1_d801c, L: 21 
 TDO 0_1101_0000_0000_0001_1100 = 0_d001c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_1100 = 007c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0010 = b702, L: 16 	in	r16, 0x32	; 50
 TDO 0000_0000_0111_1101 = 007d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_1110 = 007e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0011 = b703, L: 16 	in	r16, 0x33	; 51
 TDO 0000_0000_0111_1111 = 007f, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_0000 = 0080, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0100 = b704, L: 16 	in	r16, 0x34	; 52
 TDO 0000_0000_1000_0001 = 0081, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_0010 = 0082, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_0011_0000_0000 = 1300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0101 = b705, L: 16 	in	r16, 0x35	; 53
 TDO 0000_0000_1000_0011 = 0083, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_0100 = 0084, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0110 = b706, L: 16 	in	r16, 0x36	; 54
 TDO 0000_0000_1000_0101 = 0085, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_0110 = 0086, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0111 = b707, L: 16 	in	r16, 0x37	; 55
 TDO 0000_0000_1000_0111 = 0087, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_1000 = 0088, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1000 = b708, L: 16 	in	r16, 0x38	; 56
 TDO 0000_0000_1000_1001 = 0089, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_1010 = 008a, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1001 = b709, L: 16 	in	r16, 0x39	; 57
 TDO 0000_0000_1000_1011 = 008b, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_1100 = 008c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1010 = b70a, L: 16 	in	r16, 0x3a	; 58
 TDO 0000_0000_1000_1101 = 008d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_1110 = 008e, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1011 = b70b, L: 16 	in	r16, 0x3b	; 59
 TDO 0000_0000_1000_1111 = 008f, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_0000 = 0090, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1100 = b70c, L: 16 	in	r16, 0x3c	; 60
 TDO 0000_0000_1001_0001 = 0091, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_0010 = 0092, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1101 = b70d, L: 16 	in	r16, 0x3d	; 61
 TDO 0000_0000_1001_0011 = 0093, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_0100 = 0094, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1110 = b70e, L: 16 	in	r16, 0x3e	; 62
 TDO 0000_0000_1001_0101 = 0095, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_0110 = 0096, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1111 = b70f, L: 16 	in	r16, 0x3f	; 63
 TDO 0000_0000_1001_0111 = 0097, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_1000 = 0098, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0000_0100_0000_0000 = 0_80400, L: 21 
 TDO 0_1000_0000_0000_0000_0000 = 0_80000, L: 21 
 TDI 1_1000_0100_0000_0000_0000 = 1_84000, L: 21 
 TDO 0_1000_0000_0000_0000_0000 = 0_80000, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0100_0000_0000_0000 = 0_d4000, L: 21 
 TDO 0_1101_1000_0000_0001_1100 = 0_d801c, L: 21 
 TDI 1_1101_1100_0000_0001_1100 = 1_dc01c, L: 21 
 TDO 0_1101_1000_0000_0001_1100 = 0_d801c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1000 = b508, L: 16 	in	r16, 0x28	; 40
 TDO 0000_0000_1001_1001 = 0099, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_1011 = 009b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1001 = b509, L: 16 	in	r16, 0x29	; 41
 TDO 0000_0000_1001_1101 = 009d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_1111 = 009f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1010 = b50a, L: 16 	in	r16, 0x2a	; 42
 TDO 0000_0000_1010_0001 = 00a1, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_0011 = 00a3, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 10_1101_0100_1011 = 2_d4b, L: 14 
 TDO 00_0000_0010_0101 = 0_025, L: 14 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_0111 = 00a7, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_0000_0000_0000 = 0_000, L: 13 
 TDO 0_0000_0000_0000 = 0_000, L: 13 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1101 = b50d, L: 16 	in	r16, 0x2d	; 45
 TDO 0000_0000_1010_1001 = 00a9, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 101_1111_1000_0001 = 5_f81, L: 15 
 TDO 000_0000_0010_1011 = 0_02b, L: 15 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_1100_0000_0001_1100 = 0_dc01c, L: 21 
 TDO 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0011_0010_0000_0001 = 0_83201, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 
 TDI 1_1000_0100_0000_0000_0000 = 1_84000, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: AVR_RESET
 TDI 0 = 0, L: 1 
 TDO 0 = 0, L: 1 

INST: CMD 0x8 (stop)

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: AVR_RESET
 TDI 1 = 1, L: 1 
 TDO 0 = 0, L: 1 

INST: CMD 0xb (OCD ctrl and status)
 TDI 1_0000_0000_0000_0000_0000 = 1_00000, L: 21 
 TDO 0_0000_0000_0000_0000_0000 = 0_00000, L: 21 
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0000_0000_0000_0000 = 0_80000, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 
 TDI 1_1000_0100_1000_0000_0000 = 1_84800, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 

INST: AVR_RESET
 TDI 0 = 0, L: 1 
 TDO 1 = 1, L: 1 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0100_1000_0000_0000 = 0_84800, L: 21 
 TDO 0_1000_0100_1000_0000_0000 = 0_84800, L: 21 
 TDI 1_1000_0100_0000_0000_0000 = 1_84000, L: 21 
 TDO 0_1000_0100_1000_0000_0000 = 0_84800, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1111_1111_1111_1111_0000_0000_0000_0001 = ffff0001, L: 32 	.word	0x0001	; ????
 TDO 1111_1111_1111_1111_0000_0000_0000_0001 = ffff0001, L: 32 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_1000_0001_1010_0000 = 0_d81a0, L: 21 
 TDO 0_1101_1000_0000_0000_0100 = 0_d8004, L: 21 
 TDI 1_1101_1000_0000_0000_0100 = 1_d8004, L: 21 
 TDO 0_1101_1000_0000_0000_0100 = 0_d8004, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1110_0001 = bfe1, L: 16 	out	0x31, r30	; 49
 TDO 0000_0000_0000_0001 = 0001, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1111_0001 = bff1, L: 16 	out	0x31, r31	; 49
 TDO 0000_0000_0000_0011 = 0003, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1011_0000_0000 = fb00, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0000_0001_0000_0010 = 0_d0102, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0000_0001 = be01, L: 16 	out	0x31, r0	; 49
 TDO 0000_0000_0000_0101 = 0005, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0001_0001 = be11, L: 16 	out	0x31, r1	; 49
 TDO 0000_0000_0000_0111 = 0007, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0010_0001 = be21, L: 16 	out	0x31, r2	; 49
 TDO 0000_0000_0000_1001 = 0009, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0011_0001 = be31, L: 16 	out	0x31, r3	; 49
 TDO 0000_0000_0000_1011 = 000b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0100_0001 = be41, L: 16 	out	0x31, r4	; 49
 TDO 0000_0000_0000_1101 = 000d, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0101_0001 = be51, L: 16 	out	0x31, r5	; 49
 TDO 0000_0000_0000_1111 = 000f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0110_0001 = be61, L: 16 	out	0x31, r6	; 49
 TDO 0000_0000_0001_0001 = 0011, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_0111_0001 = be71, L: 16 	out	0x31, r7	; 49
 TDO 0000_0000_0001_0011 = 0013, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_0010_0000_0000 = 1200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1000_0001 = be81, L: 16 	out	0x31, r8	; 49
 TDO 0000_0000_0001_0101 = 0015, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0100_0000_0000_0000 = 4000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1001_0001 = be91, L: 16 	out	0x31, r9	; 49
 TDO 0000_0000_0001_0111 = 0017, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1010_0001 = bea1, L: 16 	out	0x31, r10	; 49
 TDO 0000_0000_0001_1001 = 0019, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0010_0000_0000 = 0200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1011_0001 = beb1, L: 16 	out	0x31, r11	; 49
 TDO 0000_0000_0001_1011 = 001b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1100_0001 = bec1, L: 16 	out	0x31, r12	; 49
 TDO 0000_0000_0001_1101 = 001d, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1101_0001 = bed1, L: 16 	out	0x31, r13	; 49
 TDO 0000_0000_0001_1111 = 001f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1110_0001 = bee1, L: 16 	out	0x31, r14	; 49
 TDO 0000_0000_0010_0001 = 0021, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1110_1111_0001 = bef1, L: 16 	out	0x31, r15	; 49
 TDO 0000_0000_0010_0011 = 0023, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0010_0101 = 0025, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0001_0001 = bf11, L: 16 	out	0x31, r17	; 49
 TDO 0000_0000_0010_0111 = 0027, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0001_0000_0000 = 0100, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0010_0001 = bf21, L: 16 	out	0x31, r18	; 49
 TDO 0000_0000_0010_1001 = 0029, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0011_0001 = bf31, L: 16 	out	0x31, r19	; 49
 TDO 0000_0000_0010_1011 = 002b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0100_0001 = bf41, L: 16 	out	0x31, r20	; 49
 TDO 0000_0000_0010_1101 = 002d, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_1000_0000_0000 = 0800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0101_0001 = bf51, L: 16 	out	0x31, r21	; 49
 TDO 0000_0000_0010_1111 = 002f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0011_0000_0000 = 8300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0110_0001 = bf61, L: 16 	out	0x31, r22	; 49
 TDO 0000_0000_0011_0001 = 0031, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1001_0000_0000 = f900, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0111_0001 = bf71, L: 16 	out	0x31, r23	; 49
 TDO 0000_0000_0011_0011 = 0033, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1000_0001 = bf81, L: 16 	out	0x31, r24	; 49
 TDO 0000_0000_0011_0101 = 0035, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1001_0001 = bf91, L: 16 	out	0x31, r25	; 49
 TDO 0000_0000_0011_0111 = 0037, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0010_0000_0000 = 0200, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1010_0001 = bfa1, L: 16 	out	0x31, r26	; 49
 TDO 0000_0000_0011_1001 = 0039, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1011_0001 = bfb1, L: 16 	out	0x31, r27	; 49
 TDO 0000_0000_0011_1011 = 003b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1011_0000_0000 = fb00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1100_0001 = bfc1, L: 16 	out	0x31, r28	; 49
 TDO 0000_0000_0011_1101 = 003d, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1101_0001 = bfd1, L: 16 	out	0x31, r29	; 49
 TDO 0000_0000_0011_1111 = 003f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1110_0001 = bfe1, L: 16 	out	0x31, r30	; 49
 TDO 0000_0000_0100_0001 = 0041, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_1111_0001 = bff1, L: 16 	out	0x31, r31	; 49
 TDO 0000_0000_0100_0011 = 0043, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1011_0000_0000 = fb00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0000 = b100, L: 16 	in	r16, 0x00	; 0
 TDO 0000_0000_0100_0101 = 0045, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_0111 = 0047, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0001 = b101, L: 16 	in	r16, 0x01	; 1
 TDO 0000_0000_0100_1001 = 0049, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_1011 = 004b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1000_0000_0000 = f800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0010 = b102, L: 16 	in	r16, 0x02	; 2
 TDO 0000_0000_0100_1101 = 004d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0100_1111 = 004f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1110_0000_0000 = fe00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0011 = b103, L: 16 	in	r16, 0x03	; 3
 TDO 0000_0000_0101_0001 = 0051, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_0011 = 0053, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0110 = b106, L: 16 	in	r16, 0x06	; 6
 TDO 0000_0000_0101_0101 = 0055, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_0111 = 0057, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_0111 = b107, L: 16 	in	r16, 0x07	; 7
 TDO 0000_0000_0101_1001 = 0059, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_1011 = 005b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1000 = b108, L: 16 	in	r16, 0x08	; 8
 TDO 0000_0000_0101_1101 = 005d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0101_1111 = 005f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0010_0000_0000_0000 = 2000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1001 = b109, L: 16 	in	r16, 0x09	; 9
 TDO 0000_0000_0110_0001 = 0061, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_0011 = 0063, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1010 = b10a, L: 16 	in	r16, 0x0a	; 10
 TDO 0000_0000_0110_0101 = 0065, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_0111 = 0067, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1011 = b10b, L: 16 	in	r16, 0x0b	; 11
 TDO 0000_0000_0110_1001 = 0069, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_1011 = 006b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0010_0000_0000_0000 = 2000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1101 = b10d, L: 16 	in	r16, 0x0d	; 13
 TDO 0000_0000_0110_1101 = 006d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0110_1111 = 006f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0001_0000_1111 = b10f, L: 16 	in	r16, 0x0f	; 15
 TDO 0000_0000_0111_0001 = 0071, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_0011 = 0073, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0111_1000_0000_0000 = 7800, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0000 = b300, L: 16 	in	r16, 0x10	; 16
 TDO 0000_0000_0111_0101 = 0075, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_0111 = 0077, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0011_1110_0000_0000 = 3e00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0001 = b301, L: 16 	in	r16, 0x11	; 17
 TDO 0000_0000_0111_1001 = 0079, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_1011 = 007b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0010 = b302, L: 16 	in	r16, 0x12	; 18
 TDO 0000_0000_0111_1101 = 007d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_0111_1111 = 007f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0011 = b303, L: 16 	in	r16, 0x13	; 19
 TDO 0000_0000_1000_0001 = 0081, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_0011 = 0083, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0100_0011_0000_0000 = 4300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0100 = b304, L: 16 	in	r16, 0x14	; 20
 TDO 0000_0000_1000_0101 = 0085, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_0111 = 0087, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0101 = b305, L: 16 	in	r16, 0x15	; 21
 TDO 0000_0000_1000_1001 = 0089, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_1011 = 008b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0110 = b306, L: 16 	in	r16, 0x16	; 22
 TDO 0000_0000_1000_1101 = 008d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1000_1111 = 008f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_0111_0000_0000 = f700, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_0111 = b307, L: 16 	in	r16, 0x17	; 23
 TDO 0000_0000_1001_0001 = 0091, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_0011 = 0093, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1000 = b308, L: 16 	in	r16, 0x18	; 24
 TDO 0000_0000_1001_0101 = 0095, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_0111 = 0097, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1001 = b309, L: 16 	in	r16, 0x19	; 25
 TDO 0000_0000_1001_1001 = 0099, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_1011 = 009b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1111_1111_0000_0000 = ff00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1010 = b30a, L: 16 	in	r16, 0x1a	; 26
 TDO 0000_0000_1001_1101 = 009d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1001_1111 = 009f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1011 = b30b, L: 16 	in	r16, 0x1b	; 27
 TDO 0000_0000_1010_0001 = 00a1, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_0011 = 00a3, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1100 = b30c, L: 16 	in	r16, 0x1c	; 28
 TDO 0000_0000_1010_0101 = 00a5, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_0111 = 00a7, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1101 = b30d, L: 16 	in	r16, 0x1d	; 29
 TDO 0000_0000_1010_1001 = 00a9, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_1011 = 00ab, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1110 = b30e, L: 16 	in	r16, 0x1e	; 30
 TDO 0000_0000_1010_1101 = 00ad, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1010_1111 = 00af, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0011_0000_1111 = b30f, L: 16 	in	r16, 0x1f	; 31
 TDO 0000_0000_1011_0001 = 00b1, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1011_0011 = 00b3, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0001 = b501, L: 16 	in	r16, 0x21	; 33
 TDO 0000_0000_1011_0101 = 00b5, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1011_0111 = 00b7, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0010 = b502, L: 16 	in	r16, 0x22	; 34
 TDO 0000_0000_1011_1001 = 00b9, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1011_1011 = 00bb, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0011 = b503, L: 16 	in	r16, 0x23	; 35
 TDO 0000_0000_1011_1101 = 00bd, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1011_1111 = 00bf, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0100 = b504, L: 16 	in	r16, 0x24	; 36
 TDO 0000_0000_1100_0001 = 00c1, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1100_0011 = 00c3, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0101 = b505, L: 16 	in	r16, 0x25	; 37
 TDO 0000_0000_1100_0101 = 00c5, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1100_0111 = 00c7, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0110 = b506, L: 16 	in	r16, 0x26	; 38
 TDO 0000_0000_1100_1001 = 00c9, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1100_1011 = 00cb, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_0111 = b507, L: 16 	in	r16, 0x27	; 39
 TDO 0000_0000_1100_1101 = 00cd, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1100_1111 = 00cf, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1000 = b508, L: 16 	in	r16, 0x28	; 40
 TDO 0000_0000_1101_0001 = 00d1, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1101_0011 = 00d3, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1001 = b509, L: 16 	in	r16, 0x29	; 41
 TDO 0000_0000_1101_0101 = 00d5, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1101_0111 = 00d7, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1010 = b50a, L: 16 	in	r16, 0x2a	; 42
 TDO 0000_0000_1101_1001 = 00d9, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1101_1011 = 00db, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1011 = b50b, L: 16 	in	r16, 0x2b	; 43
 TDO 0000_0000_1101_1101 = 00dd, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1101_1111 = 00df, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1100 = b50c, L: 16 	in	r16, 0x2c	; 44
 TDO 0000_0000_1110_0001 = 00e1, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1110_0011 = 00e3, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1101 = b50d, L: 16 	in	r16, 0x2d	; 45
 TDO 0000_0000_1110_0101 = 00e5, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1110_0111 = 00e7, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1110 = b50e, L: 16 	in	r16, 0x2e	; 46
 TDO 0000_0000_1110_1001 = 00e9, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1110_1011 = 00eb, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1111 = b50f, L: 16 	in	r16, 0x2f	; 47
 TDO 0000_0000_1110_1101 = 00ed, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1110_1111 = 00ef, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0000 = b700, L: 16 	in	r16, 0x30	; 48
 TDO 0000_0000_1111_0001 = 00f1, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1111_0011 = 00f3, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0000_0000_0000_0000 = 0_d0000, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_0000_0000_0000_1100 = 1_d000c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0001 = b701, L: 16 	in	r16, 0x31	; 49
 TDO 0000_0000_1111_0101 = 00f5, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0_1101_0110_0011_1100_1000 = 0_d63c8, L: 21 
 TDO 0_1101_0000_0000_0000_1100 = 0_d000c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_0000_0000_0000_1100 = 0_d000c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1111_0111 = 00f7, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1100_1101_0000_0000 = cd00, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0010 = b702, L: 16 	in	r16, 0x32	; 50
 TDO 0000_0000_1111_1001 = 00f9, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1111_1011 = 00fb, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0011 = b703, L: 16 	in	r16, 0x33	; 51
 TDO 0000_0000_1111_1101 = 00fd, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0000_1111_1111 = 00ff, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0100 = b704, L: 16 	in	r16, 0x34	; 52
 TDO 0000_0001_0000_0001 = 0101, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0000_0011 = 0103, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0001_0011_0000_0000 = 1300, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0101 = b705, L: 16 	in	r16, 0x35	; 53
 TDO 0000_0001_0000_0101 = 0105, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0000_0111 = 0107, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0110 = b706, L: 16 	in	r16, 0x36	; 54
 TDO 0000_0001_0000_1001 = 0109, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0000_1011 = 010b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_0111 = b707, L: 16 	in	r16, 0x37	; 55
 TDO 0000_0001_0000_1101 = 010d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0000_1111 = 010f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1000 = b708, L: 16 	in	r16, 0x38	; 56
 TDO 0000_0001_0001_0001 = 0111, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0001_0011 = 0113, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1001 = b709, L: 16 	in	r16, 0x39	; 57
 TDO 0000_0001_0001_0101 = 0115, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0001_0111 = 0117, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1010 = b70a, L: 16 	in	r16, 0x3a	; 58
 TDO 0000_0001_0001_1001 = 0119, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0001_1011 = 011b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1011 = b70b, L: 16 	in	r16, 0x3b	; 59
 TDO 0000_0001_0001_1101 = 011d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0001_1111 = 011f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1100 = b70c, L: 16 	in	r16, 0x3c	; 60
 TDO 0000_0001_0010_0001 = 0121, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0010_0011 = 0123, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1101 = b70d, L: 16 	in	r16, 0x3d	; 61
 TDO 0000_0001_0010_0101 = 0125, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0010_0111 = 0127, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1110 = b70e, L: 16 	in	r16, 0x3e	; 62
 TDO 0000_0001_0010_1001 = 0129, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0010_1011 = 012b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0111_0000_1111 = b70f, L: 16 	in	r16, 0x3f	; 63
 TDO 0000_0001_0010_1101 = 012d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0010_1111 = 012f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1000 = 0_8, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1000_0000_0100_0000_0000 = 0_80400, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 
 TDI 1_1000_0100_0000_0000_0000 = 1_84000, L: 21 
 TDO 0_1000_0100_0000_0000_0000 = 0_84000, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_0100_0000_0000_0000 = 0_d4000, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 
 TDI 1_1101_1100_0000_0000_1100 = 1_dc00c, L: 21 
 TDO 0_1101_1000_0000_0000_1100 = 0_d800c, L: 21 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1000 = b508, L: 16 	in	r16, 0x28	; 40
 TDO 0000_0001_0011_0001 = 0131, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0011_0011 = 0133, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 1_1100 = 1_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1001 = b509, L: 16 	in	r16, 0x29	; 41
 TDO 0000_0001_0011_0101 = 0135, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0011_0111 = 0137, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1010 = b50a, L: 16 	in	r16, 0x2a	; 42
 TDO 0000_0001_0011_1001 = 0139, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0011_1011 = 013b, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1011 = b50b, L: 16 	in	r16, 0x2b	; 43
 TDO 0000_0001_0011_1101 = 013d, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0011_1111 = 013f, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_0101_0000_1101 = b50d, L: 16 	in	r16, 0x2d	; 45
 TDO 0000_0001_0100_0001 = 0141, L: 16 

INST: CMD 0xa (avr instruction)
 TDI 1011_1111_0000_0001 = bf01, L: 16 	out	0x31, r16	; 49
 TDO 0000_0001_0100_0011 = 0143, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1100 = 0_c, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 0000_0000_0000_0000 = 0000, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 
 TDO 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 
 TDI 1_1101_1000_0000_0000_1100 = 1_d800c, L: 21 
 TDO 0_1101_1100_0000_0000_1100 = 0_dc00c, L: 21 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_1100 = 0_c, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

INST: CMD 0xb (OCD ctrl and status)
 TDI 0_1101 = 0_d, L: 5 
 TDO 0_0000 = 0_0, L: 5 
 TDI 0000_0000_0000_0000 = 0000, L: 16 
 TDO 1000_0000_0000_1100 = 800c, L: 16 

ERROR: 'NONE' 
Last sample was Nr. 21470
