SpiSink Member List

This is the complete list of members for SpiSink, including all inherited members.

_clockIsIdleHigh	SpiSink	`[private]`
_clockSampleOnLeadingEdge	SpiSink	`[private]`
_miso	SpiSink	`[private]`
_misoState	SpiSink	`[private]`
_port	SpiSink	`[private]`
_prevClkState	SpiSink	`[private]`
_prevSS	SpiSink	`[private]`
_sclk	SpiSink	`[private]`
_sclkState	SpiSink	`[private]`
_sr	SpiSink	`[private]`
_ss	SpiSink	`[private]`
_ssState	SpiSink	`[private]`
_state	SpiSink	`[private]`
SpiSink(Net &ssNet, Net &sclkNet, Net &misoNet, bool clockIsIdleHigh=true, bool clockSampleOnLeadingEdge=true)	SpiSink
Step(bool &trueHwStep, SystemClockOffset *timeToNextStepIn_ns=0)	SpiSink	`[private, virtual]`