| ►CAnalogSignalChange | |
| CHWAcomp | Analog comparator peripheral |
| ►CHWAd | |
| CHWAd_SFIOR | |
| CAnalogValue | Implements "real" analog value as float |
| CApplication | |
| CAvrFactory | Produces AVR devices |
| CAvrFuses | Support for fuse bits |
| CAvrLockBits | Support for lock bits |
| CDecLong | |
| ►CDecodedInstruction | Base class of core instruction |
| Cavr_op_ADC | |
| Cavr_op_ADD | |
| Cavr_op_ADIW | |
| Cavr_op_AND | |
| Cavr_op_ANDI | |
| Cavr_op_ASR | |
| Cavr_op_BCLR | |
| Cavr_op_BLD | |
| Cavr_op_BRBC | |
| Cavr_op_BRBS | |
| Cavr_op_BREAK | |
| Cavr_op_BSET | |
| Cavr_op_BST | |
| Cavr_op_CALL | |
| Cavr_op_CBI | |
| Cavr_op_COM | |
| Cavr_op_CP | |
| Cavr_op_CPC | |
| Cavr_op_CPI | |
| Cavr_op_CPSE | |
| Cavr_op_DEC | |
| Cavr_op_EICALL | |
| Cavr_op_EIJMP | |
| Cavr_op_ELPM | |
| Cavr_op_ELPM_Z | |
| Cavr_op_ELPM_Z_incr | |
| Cavr_op_EOR | |
| Cavr_op_ESPM | |
| Cavr_op_FMUL | |
| Cavr_op_FMULS | |
| Cavr_op_FMULSU | |
| Cavr_op_ICALL | |
| Cavr_op_IJMP | |
| Cavr_op_ILLEGAL | |
| Cavr_op_IN | |
| Cavr_op_INC | |
| Cavr_op_JMP | |
| Cavr_op_LD_X | |
| Cavr_op_LD_X_decr | |
| Cavr_op_LD_X_incr | |
| Cavr_op_LD_Y_decr | |
| Cavr_op_LD_Y_incr | |
| Cavr_op_LD_Z_decr | |
| Cavr_op_LD_Z_incr | |
| Cavr_op_LDD_Y | |
| Cavr_op_LDD_Z | |
| Cavr_op_LDI | |
| Cavr_op_LDS | |
| Cavr_op_LPM | |
| Cavr_op_LPM_Z | |
| Cavr_op_LPM_Z_incr | |
| Cavr_op_LSR | |
| Cavr_op_MOV | |
| Cavr_op_MOVW | |
| Cavr_op_MUL | |
| Cavr_op_MULS | |
| Cavr_op_MULSU | |
| Cavr_op_NEG | |
| Cavr_op_NOP | |
| Cavr_op_OR | |
| Cavr_op_ORI | |
| Cavr_op_OUT | |
| Cavr_op_POP | |
| Cavr_op_PUSH | |
| Cavr_op_RCALL | |
| Cavr_op_RET | |
| Cavr_op_RETI | |
| Cavr_op_RJMP | |
| Cavr_op_ROR | |
| Cavr_op_SBC | |
| Cavr_op_SBCI | |
| Cavr_op_SBI | |
| Cavr_op_SBIC | |
| Cavr_op_SBIS | |
| Cavr_op_SBIW | |
| Cavr_op_SBRC | |
| Cavr_op_SBRS | |
| Cavr_op_SLEEP | |
| Cavr_op_SPM | |
| Cavr_op_ST_X | |
| Cavr_op_ST_X_decr | |
| Cavr_op_ST_X_incr | |
| Cavr_op_ST_Y_decr | |
| Cavr_op_ST_Y_incr | |
| Cavr_op_ST_Z_decr | |
| Cavr_op_ST_Z_incr | |
| Cavr_op_STD_Y | |
| Cavr_op_STD_Z | |
| Cavr_op_STS | |
| Cavr_op_SUB | |
| Cavr_op_SUBI | |
| Cavr_op_SWAP | |
| Cavr_op_WDR | |
| ►CDumper | |
| CDumpVCD | |
| CWarnUnknown | |
| CDumpManager | |
| ►CExternalType | |
| CExtAnalogPin | |
| CExtPin | |
| CKeyboard | |
| CSerialRx | |
| CSerialTx | |
| CTraceControl | |
| CUserInterface | |
| ►CFunktor | |
| CIrqFunktor | |
| ►CGdbServerSocket | Interface for server socket wrapper |
| CGdbServerSocketUnix | Interface implementation for server socket wrapper on unix systems |
| ►CHardware | |
| CAddressExtensionRegister | |
| ►CBasicTimerUnit | Basic timer unit |
| ►CHWTimer16 | Extends BasicTimerUnit to provide common support to all types of 16Bit timer units |
| CHWTimer16_1C | Timer unit with 16Bit counter and one output compare unit |
| CHWTimer16_2C2 | Timer unit with 16Bit counter and 2 output compare units and 2 config registers |
| CHWTimer16_2C3 | Timer unit with 16Bit counter and 2 output compare units, but 3 config registers |
| CHWTimer16_3C | Timer unit with 16Bit counter and 3 output compare units |
| ►CHWTimer8 | Extends BasicTimerUnit to provide common support to all types of 8Bit timer units |
| CHWTimer8_0C | Timer unit with 8Bit counter and no output compare unit |
| CHWTimer8_1C | Timer unit with 8Bit counter and one output compare unit |
| CHWTimer8_2C | Timer unit with 8Bit counter and 2 output compare unit |
| CCLKPRRegister | Implement CLKPR register |
| CExternalIRQHandler | Handler for external IRQ's to communicate with IRQ system and mask/flag registers |
| CFlashProgramming | Provides the programming engine for flash self programming |
| CGPIORegister | A register in IO register space unrelated to any peripheral. "GPIORx" in datasheets |
| CHWAcomp | Analog comparator peripheral |
| CHWAd | |
| CHWEeprom | |
| CHWPcir | This class is never used |
| CHWPort | Defines a Port, e.g. a hardware device for GPIO |
| ►CHWPrescaler | Prescaler unit for support timers with clock |
| CHWPrescalerAsync | Extends HWPrescaler with a external clock oszillator pin |
| CHWSpi | |
| CHWTimerTinyX5 | Timer unit for timer 1 on ATtiny25/45/85 |
| ►CHWUart | Implements the I/O hardware necessary to do UART transfers |
| CHWUsart | Implements the I/O hardware necessary to do USART transfers |
| ►CHWUSI | |
| CHWUSI_BR | |
| CHWWado | |
| COSCCALRegister | Implement OSCCAL register |
| CTimerIRQRegister | Provices flag and mask register for timer interrupts and connects irq lines to irqsystem |
| CXDIVRegister | Implement XDIV register |
| ►CHasPinNotifyFunction | |
| CExternalIRQPort | Pin-change interrupt on all pins of a port |
| CExternalIRQSingle | External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration |
| CHWAcomp | Analog comparator peripheral |
| ►CHWAdmux | |
| CHWAdmux6 | |
| CHWAdmuxM2560 | |
| ►CHWAdmuxM8 | |
| CHWAdmuxM16 | |
| CHWAdmuxT25 | |
| CHWUSI | |
| CPinChange | This class is never used. Delete? (Pin-change interrupt is done by ExternalIRQPort.) |
| CPinMonitor | |
| ►CSerialRxBasic | |
| CSerialRx | |
| CSerialRxBuffered | |
| CHexChar | |
| CHexShort | |
| ►CHWARef | Reference source for ADC (base class) |
| CHWARef8 | ADC reference is selected on 4 diff. sources: Vcc, aref pin, bandgap or 2.56V reference |
| ►CHWARefPin | ADC reference is taken from special ADREF pin (no port pin) |
| CHWARef4 | ADC reference is selected on 3 or 4 different sources: Vcc, aref pin, bandgap or 2.56V reference |
| CHWPcicrApi | |
| ►CHWPcifrApi | |
| CHWPcir | This class is never used |
| ►CHWPcirMaskApi | |
| CHWPcir | This class is never used |
| ►CHWPcmskApi | |
| CHWPcmsk | This class is never used |
| ►CHWPcmskPinApi | |
| CHWPcmsk | This class is never used |
| ►CHWSreg_bool | |
| CHWSreg | |
| ►CHWStack | Implements a stack register with stack logic |
| CHWStackSram | Implements a stack with stack register using RAM as stackarea |
| CThreeLevelStack | Implements a stack with 3 levels deep (used as returnstack by ATtiny15 an other) |
| CHWTimerTinyX5_SyncReg | Helper class to simulate transfer of register values from bus area to timer async area |
| CICaptureSource | Class, which provides input capture source for 16bit timers |
| ►CIOSpecialRegClient | Interface class to connect hardware units to control registers |
| ►CExternalIRQ | Basic handler for one external IRQ, handles control register |
| CExternalIRQPort | Pin-change interrupt on all pins of a port |
| CExternalIRQSingle | External interrupt (INT0, INT1...) on a single pin, one and 2 bit configuration |
| CExternalIRQHandler | Handler for external IRQ's to communicate with IRQ system and mask/flag registers |
| CHWAcomp | Analog comparator peripheral |
| CHWAd_SFIOR | |
| CHWPrescaler | Prescaler unit for support timers with clock |
| CHWTimerTinyX5 | Timer unit for timer 1 on ATtiny25/45/85 |
| CTimerIRQRegister | Provices flag and mask register for timer interrupts and connects irq lines to irqsystem |
| CIRQLine | Represents a timer interrupt line, Frontend for timer interrupts |
| CIrqStatisticEntry | |
| CIrqStatisticPerVector | |
| ►Cstd::map< K, T > | STL class |
| CInitMap< T_Key, T_Value > | |
| ►CMemory | Hold a memory block and symbol informations |
| CAvrFlash | Holds AVR flash content and symbol informations |
| CData | Hold data memory block and symbol informations |
| CHWEeprom | |
| ►CPin | Pin class, handles input and output to external parts |
| CAdcAnalogPin | Pin class to provide a analog input signal |
| CExtAnalogPin | |
| CExtPin | |
| COpenDrain | Open drain Pin class, a special pin with open drain behavior |
| CPortPin | Pin class for HWPort, a special pin with override functionality for output stage |
| CPinAtPort | |
| ►CPrescalerMultiplexer | PrescalerMultiplexer without external count pin |
| CPrescalerMultiplexerExt | PrescalerMultiplexer with external count pin |
| CPrescalerMultiplexerT15 | PrescalerMultiplexer for ATTiny15 |
| ►CPrintable | |
| CIrqStatistic | |
| ►CRWMemoryMember | Member of any memory area in an AVR device |
| CCLKPRRegister | Implement CLKPR register |
| CGPIORegister | A register in IO register space unrelated to any peripheral. "GPIORx" in datasheets |
| CInvalidMem | Memory on which access should be avoided! :-) |
| CIOReg< P > | IO register to be specialized for a certain class/hardware |
| CIOReg< AddressExtensionRegister > | |
| CIOReg< FlashProgramming > | |
| CIOReg< HWAcomp > | |
| CIOReg< HWAd > | |
| CIOReg< HWEeprom > | |
| CIOReg< HWPcir > | |
| CIOReg< HWPcmsk > | |
| CIOReg< HWPort > | |
| CIOReg< HWSpi > | |
| CIOReg< HWStackSram > | |
| CIOReg< HWTimer16 > | |
| CIOReg< HWTimer16_1C > | |
| CIOReg< HWTimer16_2C2 > | |
| CIOReg< HWTimer16_2C3 > | |
| CIOReg< HWTimer16_3C > | |
| CIOReg< HWTimer8 > | |
| CIOReg< HWTimer8_0C > | |
| CIOReg< HWTimer8_1C > | |
| CIOReg< HWTimer8_2C > | |
| CIOReg< HWTimerTinyX5 > | |
| CIOReg< HWUart > | |
| CIOReg< HWUsart > | |
| CIOReg< HWUSI > | |
| CIOReg< HWUSI_BR > | |
| CIOReg< HWWado > | |
| CIOSpecialReg | |
| CNotSimulatedRegister | An IO register which is not simulated in the moment. Reads and writes are ignored and produce warning |
| COSCCALRegister | Implement OSCCAL register |
| CRAM | One byte in any AVR RAM |
| CRWAbort | Abort() on access memory |
| CRWExit | Exit() on access memory |
| CRWReadFromFile | FIFO read memory |
| CRWSreg | |
| CRWWriteToFile | FIFO write memory |
| CXDIVRegister | Implement XDIV register |
| ►CSimulationMember | |
| CAdcPin | Provides input of aanalog signal into simulator |
| ►CAvrDevice | Basic AVR device, contains the core functionality |
| ►CAvrDevice_at90canbase | |
| CAvrDevice_at90can128 | AVR device class for AT90CAN128, see AvrDevice_at90canbase |
| CAvrDevice_at90can32 | AVR device class for AT90CAN32, see AvrDevice_at90canbase |
| CAvrDevice_at90can64 | AVR device class for AT90CAN64, see AvrDevice_at90canbase |
| CAvrDevice_at90s4433 | AVRDevice class for AT90S4433 |
| CAvrDevice_at90s8515 | AVRDevice class for AT90S8515 |
| ►CAvrDevice_atmega1284Abase | |
| CAvrDevice_atmega1284A | |
| CAvrDevice_atmega164A | |
| CAvrDevice_atmega324A | |
| CAvrDevice_atmega644A | |
| ►CAvrDevice_atmega128base | AVRDevice class for ATMega64 and ATMega128 |
| CAvrDevice_atmega128 | AVR device class for ATMega128, see AvrDevice_atmega128base |
| CAvrDevice_atmega64 | AVR device class for ATMega64, see AvrDevice_atmega128base |
| ►CAvrDevice_atmega16_32 | AVRDevice class for ATMega16 and ATMega32 |
| CAvrDevice_atmega16 | AVR device class for ATMega16, see AvrDevice_atmega16_32 |
| CAvrDevice_atmega32 | AVR device class for ATMega32, see AvrDevice_atmega16_32 |
| ►CAvrDevice_atmega2560base | |
| CAvrDevice_atmega1280 | |
| CAvrDevice_atmega2560 | |
| CAvrDevice_atmega640 | |
| ►CAvrDevice_atmega668base | |
| CAvrDevice_atmega168 | AVR device class for ATMega168, see AvrDevice_atmega668base |
| CAvrDevice_atmega328 | AVR device class for ATMega328, see AvrDevice_atmega668base |
| CAvrDevice_atmega48 | AVR device class for ATMega48, see AvrDevice_atmega668base |
| CAvrDevice_atmega88 | AVR device class for ATMega88, see AvrDevice_atmega668base |
| CAvrDevice_atmega8 | AVRDevice class for ATMega8 |
| CAvrDevice_attiny2313 | AVRDevice class for ATTiny2313 |
| ►CAvrDevice_attinyX5 | AVRDevice class for ATTiny25/45/85 |
| CAvrDevice_attiny25 | AVR device class for ATTiny25, see AvrDevice_attinyX5 |
| CAvrDevice_attiny45 | AVR device class for ATTiny45, see AvrDevice_attinyX5 |
| CAvrDevice_attiny85 | AVR device class for ATTiny85, see AvrDevice_attinyX5 |
| CGdbServer | GDB server instance to give the possibility to debug target by debugger |
| CHWTimerTinyX5 | Timer unit for timer 1 on ATtiny25/45/85 |
| CHWUSI | |
| CKeyboard | |
| CLcd | |
| CScope | |
| CSerialRxBasic | |
| ►CSerialTxBuffered | |
| CSerialTx | |
| CSpiSink | |
| CSpiSource | |
| CUserInterface | |
| ►CSocket | |
| CUserInterface | |
| CSystemClock | Class to store and manage the central simulation time |
| CSystemConsoleHandler | Class, that handle messages to console and also exit/abort calls |
| CThread | |
| CThreadList | |
| ►CTimerEventListener | |
| CHWUSI | |
| CTimerTinyX5_OCR | PWM output unit for timer 1 on ATtiny25/45/85 |
| ►CTraceValue | |
| CTraceValueOutput | |
| CTwiceTV | |
| ►CTraceValueRegister | Build a register for TraceValue's |
| CAddressExtensionRegister | |
| CAvrDevice | Basic AVR device, contains the core functionality |
| CBasicTimerUnit | Basic timer unit |
| CHWAcomp | Analog comparator peripheral |
| CHWAd | |
| CHWEeprom | |
| CHWIrqSystem | |
| CHWPort | Defines a Port, e.g. a hardware device for GPIO |
| CHWSpi | |
| CHWStackSram | Implements a stack with stack register using RAM as stackarea |
| CHWTimerTinyX5 | Timer unit for timer 1 on ATtiny25/45/85 |
| CHWUart | Implements the I/O hardware necessary to do UART transfers |
| CHWUSI | |
| CHWWado | |
| CThreeLevelStack | Implements a stack with 3 levels deep (used as returnstack by ATtiny15 an other) |
| CTimerIRQRegister | Provices flag and mask register for timer interrupts and connects irq lines to irqsystem |
| CTraceValueCoreRegister | |
| ►Cstd::vector< T > | STL class |
| CBreakpoints | |
| CExitpoints | |
| CMinHeap< Key, Value > | |
| CMinHeap< SystemClockOffset, SimulationMember *> | |
| CNet | Connect Pins to each other and transfers a output change from a pin to input values for all pins |
1.8.13