board_stbrfa1.h
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    00001 /* Copyright (c) 2011 Joerg Wunsch
    00002    All rights reserved.
    00003
    00004    Redistribution and use in source and binary forms, with or without
    00005    modification, are permitted provided that the following conditions
    00006    are met:
    00007
    00008    * Redistributions of source code must retain the above copyright
    00009      notice, this list of conditions and the following disclaimer.
    00010    * Redistributions in binary form must reproduce the above copyright
    00011      notice, this list of conditions and the following disclaimer in the
    00012      documentation and/or other materials provided with the distribution.
    00013    * Neither the name of the authors nor the names of its contributors
    00014      may be used to endorse or promote products derived from this software
    00015      without specific prior written permission.
    00016
    00017    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    00018    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    00019    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    00020    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
    00021    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
    00022    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
    00023    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
    00024    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
    00025    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
    00026    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    00027    POSSIBILITY OF SUCH DAMAGE. */
    00028
    00029 /* $Id$ */
    00116 #ifndef BOARD_STBRFA1_H
    00117 #define BOARD_STBRFA1_H
    00118
    00120 #if defined(stb128rfa1)
    00121 # define BOARD_TYPE (BOARD_STB128RFA1)
    00122 # define BOARD_NAME "stb128rfa1"
    00123 # define RADIO_TYPE (RADIO_ATMEGA128RFA1_C)
    00124 #elif defined(stb256rfr2)
    00125 # define BOARD_TYPE (BOARD_STB256RFR2)
    00126 # define BOARD_NAME "stb256rfr2"
    00127 # define RADIO_TYPE (RADIO_ATMEGA256RFR2)
    00128 #endif
    00129
    00130
    00131 /*=== Compile time parameters ========================================*/
    00132
    00133 #ifndef DEFAULT_SPI_RATE
    00134 # define DEFAULT_SPI_RATE  (SPI_RATE_1_2)
    00135 #endif
    00136
    00137 /*=== radio interface definition =====================================*/
    00138 #if BOARD_TYPE == BOARD_STB230 || BOARD_TYPE == BOARD_STB230B
    00139 # include "base_rdk230.h"
    00140 #elif BOARD_TYPE == BOARD_STB128RFA1 || BOARD_TYPE == BOARD_STB256RFR2
    00141 # define TRX_RESET_LOW()   do { TRXPR &= ~_BV(TRXRST); } while (0)
    00142 # define TRX_RESET_HIGH()  do { TRXPR |= _BV(TRXRST); } while (0)
    00143 # define TRX_SLPTR_LOW()   do { TRXPR &= ~_BV(SLPTR); } while (0)
    00144 # define TRX_SLPTR_HIGH()  do { TRXPR |= _BV(SLPTR); } while (0)
    00145 # define TRX_TSTAMP_REG TCNT1
    00146 #else
    00147 # include "base_rdk2xx.h"
    00148 #endif
    00149
    00150 /*
    00151  * The IO subsystem of the Sensor Terminal Board is, a little
    00152  * cumbersome to operate.  Besides the LEDs that are operated on an
    00153  * MMIO register and cannot be read back, the FT245 is attached to the
    00154  * external memory bus through a 74VHC245MTC bus driver which is by
    00155  * default enabled to drive the bus (rather than to read it).  Thus,
    00156  * much care must be taken to avoid a bus contention where both, the
    00157  * 74VHC245MTC and the AVR drive the multiplexed address/data bus.
    00158  *
    00159  * We avoid that bus contention by swapping the meaning of the chip
    00160  * select signal for the FT245 and the actual /WR line: both are ORed
    00161  * together, so for the actual effect towards the FT245, it does not
    00162  * matter whether we pulse /WR, or we pulse the correct high address
    00163  * selection.
    00164  */
    00165
    00166 static inline void hif_mmio_init(void)
    00167 {
    00168     DDRD |= 0xc0;               /* xmem A14...A15 */
    00169     PORTD = (PORTD & ~0xc0) | 0x80; /* high addr 0x80 => external
    00170                                      * SRAM */
    00171     PORTE &= ~0x10;             /* PE4: xmem /WR, activate to make the
    00172                                  * 74VHC245MTC not drive the bus */
    00173     PORTE |= 0x20;              /* PE5: xmem /RD, deactivate */
    00174     DDRE |= 0x30;               /* make /RD and /WR outputs */
    00175     PORTG &= ~0x04;             /* PG2: xmem ALE; not used but keep
    00176                                  * low all the time */
    00177     DDRG |= 0x04;
    00178 }
    00179
    00180 static inline void hif_usb_write(uint8_t val)
    00181 {
    00182     DDRB = 0xFF;
    00183     PORTB = val;
    00184     PORTD = (PORTD & ~0xc0);    /* select FT245 -> /WR pulse */
    00185     __asm volatile("nop");
    00186     PORTD = (PORTD & ~0xc0) | 0x80; /* re-select SRAM */
    00187     DDRB = 0;
    00188     PORTB = 0;                  /* avoid pullups */
    00189 }
    00190
    00191 static inline uint8_t hif_usb_read(void)
    00192 {
    00193     PORTE |= 0x10;              /* de-assert /WR */
    00194     PORTD = (PORTD & ~0xc0);    /* select FT245 */
    00195     PORTE &= ~0x20;             /* /RD pulse */
    00196     PORTE |= 0x20;
    00197     __asm volatile("nop");
    00198     uint8_t rv = PINB;
    00199     PORTD = (PORTD & ~0xc0) | 0x80; /* re-select SRAM */
    00200     PORTE &= ~0x10;                 /* re-assert /WR */
    00201
    00202     return rv;
    00203 }
    00204
    00205
    00206 static inline void hif_led_write(uint8_t val)
    00207 {
    00208     PORTE |= 0x10;              /* de-assert /WR */
    00209     DDRB = 0xFF;
    00210     PORTB = val;
    00211     PORTD = (PORTD & ~0xc0) | 0x40; /* select IO address */
    00212     PORTE &= ~0x10;                 /* /WR pulse */
    00213     PORTE |= 0x10;
    00214     __asm volatile("nop");
    00215     PORTD = (PORTD & ~0xc0) | 0x80; /* re-select SRAM */
    00216     DDRB = 0;
    00217     PORTB = 0;                  /* avoid pullups */
    00218     PORTE &= ~0x10;             /* re-assert /WR */
    00219 }
    00220
    00221 static inline uint8_t hif_key_read(void)
    00222 {
    00223     PORTE |= 0x10;              /* de-assert /WR */
    00224     PORTD = (PORTD & ~0xc0) | 0x40; /* select IO address */
    00225     PORTE &= ~0x20;             /* /RD pulse */
    00226     PORTE |= 0x20;
    00227     __asm volatile("nop");
    00228     uint8_t rv = PINB;
    00229     PORTD = (PORTD & ~0xc0) | 0x80; /* re-select SRAM */
    00230     PORTE &= ~0x10;                 /* re-assert /WR */
    00231
    00232     return rv;
    00233 }
    00234
    00235
    00236
    00237 /*=== LED access macros ==============================================*/
    00238 #if !defined(USE_RCB_LEDS)
    00239 /*=== use LEDs on STB (Memory Mapped) ===*/
    00240
    00241 # define LED_SHADOW    GPIOR2
    00242 # define LED_MASK      (0x03)
    00243 # define LED_SHIFT     (0)
    00244 # define LEDS_INVERSE  (1)
    00245 # define LED_NUMBER    (2)
    00246
    00247 # define LED_INIT()\
    00248         do{\
    00249             hif_mmio_init(); \
    00250             LED_SHADOW = LED_MASK;\
    00251             hif_led_write(LED_SHADOW);        \
    00252         }while(0)
    00253
    00254 # define LED_SET_VALUE(x) \
    00255         do{\
    00256             LED_SHADOW = (LED_SHADOW & ~LED_MASK) | ((~x<<LED_SHIFT) & LED_MASK);\
    00257             hif_led_write(LED_SHADOW);\
    00258         }while(0)
    00259
    00260 # define LED_GET_VALUE()\
    00261         ((~LED_SHADOW & LED_MASK) >> LED_SHIFT)
    00262
    00263 # define LED_SET(ln)\
    00264         do{\
    00265             LED_SHADOW &= ~(_BV(ln+LED_SHIFT) & LED_MASK);\
    00266             hif_led_write(LED_SHADOW);\
    00267         }while(0)
    00268
    00269 # define LED_CLR(ln)\
    00270         do{\
    00271             LED_SHADOW |= (_BV(ln+LED_SHIFT) & LED_MASK);\
    00272             hif_led_write(LED_SHADOW);\
    00273         }while(0)
    00274
    00275 # define LED_VAL(msk,val)\
    00276         do{\
    00277             LED_SHADOW &= ~(LED_MASK|(msk<<LED_SHIFT)); \
    00278             LED_SHADOW |= ~(val & (LED_MASK|msk));\
    00279             hif_led_write(LED_SHADOW);\
    00280         }while(0)
    00281
    00282
    00283 # define LED_TOGGLE(ln)\
    00284         do{\
    00285             LED_SHADOW ^= (_BV(ln+LED_SHIFT) & LED_MASK);\
    00286             hif_led_write(LED_SHADOW);\
    00287         }while(0)
    00288
    00289 #else
    00290 /*=== use LEDs on RCB (IO Mapped) ===*/
    00291 # define LED_PORT      PORTE
    00292 # define LED_DDR       DDRE
    00293 # define LED_MASK      (0x1c)
    00294 # define LED_SHIFT     (2)
    00295 # define LEDS_INVERSE  (1)
    00296 # define LED_NUMBER    (3)
    00297 #endif
    00298 /*=== KEY access macros ==============================================*/
    00299 #define PIN_KEY       (hif_key_read())
    00300 #define MASK_KEY      (0x1)
    00301 #define SHIFT_KEY     (0)
    00302 #define INVERSE_KEYS  (0)
    00303 #define PULLUP_KEYS   (0)
    00304 #define KEY_INIT      hif_mmio_init
    00305
    00306 /*=== Host Interface ================================================*/
    00307 #define HIF_TYPE      (HIF_FT245)
    00308 #define HIF_IO_ENABLE hif_mmio_init
    00309 #define HIF_USB_READ()  hif_usb_read()
    00310 #define HIF_USB_WRITE(x) hif_usb_write(x)
    00311 #define HIF_NO_DATA   (0x0100)
    00312 #define FT245_DDR    DDRE
    00313 #define FT245_PIN    PINE
    00314 #define FT245_TXE    _BV(6)
    00315 #define FT245_RXF    _BV(7)
    00316 #define FT245_INIT() do { \
    00317            FT245_DDR &= ~(FT245_TXE|FT245_RXF);\
    00318         } while(0)
    00319
    00320 #define FT245_TX_IS_BLOCKED()    (0 != (FT245_PIN & FT245_TXE))
    00321 #define FT245_RX_HAS_DATA()      (0 == (FT245_PIN & FT245_RXF))
    00322
    00323 /*=== TIMER Interface ===============================================*/
    00324 #define HWTMR_PRESCALE  (1)
    00325 #define HWTIMER_TICK    ((1.0*HWTMR_PRESCALE)/F_CPU)
    00326 #define HWTIMER_TICK_NB (0xFFFFUL+1)
    00327 #define HWTIMER_REG     (TCNT1)
    00328 #define TIMER_TICK      (HWTIMER_TICK_NB * HWTIMER_TICK)
    00329 #define TIMER_POOL_SIZE     (4)
    00330
    00332 #define TIMER_IRQ_vect   TIMER1_OVF_vect
    00333
    00343 # define TIMER_INIT() \
    00344     do{ \
    00345         TCCR1B |= _BV(CS10); \
    00346         TIMSK1 |= _BV(TOIE1); \
    00347     }while(0)
    00348
    00349 #endif /* BOARD_STB_H*/