board_dummy.h
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    00001 /* Copyright (c) 2007 Axel Wachtler
    00002    All rights reserved.
    00003
    00004    Redistribution and use in source and binary forms, with or without
    00005    modification, are permitted provided that the following conditions
    00006    are met:
    00007
    00008    * Redistributions of source code must retain the above copyright
    00009      notice, this list of conditions and the following disclaimer.
    00010    * Redistributions in binary form must reproduce the above copyright
    00011      notice, this list of conditions and the following disclaimer in the
    00012      documentation and/or other materials provided with the distribution.
    00013    * Neither the name of the authors nor the names of its contributors
    00014      may be used to endorse or promote products derived from this software
    00015      without specific prior written permission.
    00016
    00017    THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
    00018    AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
    00019    IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
    00020    ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
    00021    LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
    00022    CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
    00023    SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
    00024    INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
    00025    CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
    00026    ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
    00027    POSSIBILITY OF SUCH DAMAGE. */
    00028
    00029 /* $Id$ */
    00043 /*%*
    00044  *
    00045  * @defgroup grp<brD> ....
    00046  * @brief .....
    00047  *
    00048  *
    00049  *
    00050  * The wiring of the radio and the AT.... is shown below:
    00051 *
    00052 <pre>
    00053      AVR      RF230
    00054      ---      -----
    00055      Pxx  -->  SLPTR
    00056      Pxx  <--  MCLK
    00057      Pxx  <--  IRQ (INT2)
    00058      Pxx  -->  RSTN
    00059      Pxx  -->  SS
    00060      Pxx  -->  MOSI
    00061      Pxx  <--  MISO
    00062      Pxx  -->  SCK
    00063
    00064      <other peripherals>
    00065 </pre>
    00066  */
    00067 /*%*
    00068  * @addtogroup grpBoard
    00069  * @{
    00070  */
    00071
    00073 #define BOARD_NAME_<brd> "<brd>"
    00074
    00075 #ifndef BOARD_DUMMY_H
    00076 #define BOARD_DUMMY_H
    00077
    00078 #define BOARD_TYPE (<brd>)
    00079 #define BOARD_NAME BOARD_NAME_<brd>
    00081 /*=== Compile time parameters ========================================*/
    00082 #ifndef MAX_FRAME_SIZE
    00083 # define MAX_FRAME_SIZE (127)
    00084 #endif
    00085
    00086 #ifndef DEFAULT_SPI_RATE
    00087 # define DEFAULT_SPI_RATE  (SPI_RATE_1_2)
    00088 #endif
    00089
    00090 /*=== Hardware Components ============================================*/
    00091 #ifndef RADIO_TYPE
    00092 #define RADIO_TYPE (RADIO_AT86RF230)
    00093 #endif
    00094
    00095 /*=== TRX pin access macros ==========================================*/
    00096
    00097 #define DDR_TRX_RESET   DDR...
    00098 #define PORT_TRX_RESET  PORT...
    00099 #define MASK_TRX_RESET  (_BV(...))
    00100 /* check in board.h if standard definitions of TRX_RESET_INIT,
    00101    TRX_RESET_HIGH, TRX_RESET_LOW are Ok, otherwise define here */
    00102
    00103 #define PORT_TRX_SLPTR  PORT...
    00104 #define DDR_TRX_SLPTR   DDR...
    00105 #define MASK_TRX_SLPTR  (_BV(PB...))
    00106 /* check in board.h if standard definitions of TRX_SLPTR_INIT,
    00107    TRX_SLPTR_HIGH, TRX_SLPTR_LOW are Ok, otherwise define here */
    00108
    00109 /*=== IRQ access macros ==============================================*/
    00110 # define TRX_IRQ         _BV(INT...)
    00111 # define TRX_IRQ_vect    INT..._vect
    00114 # define TRX_IRQ_INIT()  do{\
    00115                             MCUCSR  |= _BV(ISC...);\
    00116                           } while(0)
    00119 #define DI_TRX_IRQ() {GICR... &= (~(TRX_IRQ));}
    00120
    00121 #define EI_TRX_IRQ() {GICR... |= (TRX_IRQ);}
    00122
    00124 #define TRX_TSTAMP_REG ...
    00125
    00126 /*=== SPI access macros ==============================================*/
    00127 #define SPI_TYPE  SPI_TYPE_SPI
    00128 #define DDR_SPI  (DDR...)
    00129 #define PORT_SPI (PORT...)
    00131 #define SPI_MOSI _BV(P...)
    00132 #define SPI_MISO _BV(P...)
    00133 #define SPI_SCK  _BV(P...)
    00134 #define SPI_SS   _BV(P...)
    00136 #define SPI_DATA_REG SPDR...
    00142 static inline void SPI_INIT(uint8_t spirate)
    00143 {
    00144     /* first configure SPI Port, then SPCR */
    00145     DDR_SPI  |= SPI_MOSI | SPI_SCK | SPI_SS;
    00146     DDR_SPI  &= ~SPI_MISO;
    00147     PORT_SPI |= SPI_SCK | SPI_SS;
    00148
    00149     SPCR = (_BV(SPE) | _BV(MSTR));
    00150
    00151     SPCR &= ~(_BV(SPR1) | _BV(SPR0) );
    00152     SPSR &= ~_BV(SPI2X);
    00153
    00154     SPCR |= (spirate & 0x03);
    00155     SPSR |= ((spirate >> 2) & 0x01);
    00156
    00157 }
    00158
    00160 #define SPI_SELN_LOW()       uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS
    00161
    00162 #define SPI_SELN_HIGH()      PORT_SPI |= SPI_SS; SREG = sreg
    00163
    00164 #define SPI_WAITFOR()        do { while((SPSR & _BV(SPIF)) == 0);} while(0)
    00165
    00166 /*=== LED access macros ==============================================*/
    00167 #define NO_LEDS       (1)
    00168 #define LED_PORT      PORT.
    00169 #define LED_DDR       DDR.
    00170 #define LED_MASK      (0x..)
    00171 #define LED_SHIFT     (.)
    00172 #define LEDS_INVERSE  (.)
    00174 #define LED_NUMBER    (.)
    00177 /*=== KEY access macros ==============================================*/
    00178 #define NO_KEYS       (1)
    00179 #define PORT_KEY      PORT.
    00180 #define PIN_KEY       PIN.
    00181 #define DDR_KEY       DDR.
    00182 #define MASK_KEY      (0x..)
    00183 #define SHIFT_KEY     (.)
    00184 #define INVERSE_KEYS  (.)
    00186 #define PULLUP_KEYS   (.)
    00189 /*=== Host Interface ================================================*/
    00190
    00191 #define HIF_TYPE    HIF_.
    00192
    00193 /*=== TIMER Interface ===============================================*/
    00194 #define NO_TIMER (1)
    00195
    00196 #define HWTMR_PRESCALE  (1)
    00197 #define HWTIMER_TICK    ((1.0*HWTMR_PRESCALE)/F_CPU)
    00199 #define HWTIMER_TICK_NB (0xFFFFUL)
    00201 #define HWTIMER_REG (TCNT1)
    00203 #define TIMER_TICK (HWTIMER_TICK * HWTIMER_TICK_NB)
    00204
    00207 #define TIMER_POOL_SIZE (0)
    00210 #define TIMER_INIT() do{}while(0)
    00214 #define TIMER_IRQ_vect   ...
    00215
    00216
    00217 /*=== OSCCAL tuning =================================================*/
    00218 #ifndef TUNED_OSCCAL
    00219 # define TUNED_OSCCAL (0xbf)  /* default is 0xb1, but @2.9V 0xbf is better */
    00220 #endif
    00221 #endif